A strain engineering approach enhances the performance of 2D semiconductor transistors

Manipulating the mechanical deformation of materials, also known as strain engineering, has enabled engineers to improve electronics over the past decades, such as increasing the mobility of charge carriers in devices. Over the past few years, some research has attempted to develop effective strain manipulation strategies in two-dimensional (2D) semiconductors that are compatible with existing industrial processes.

Researchers at Stanford University recently introduced a CMOS-compatible approach to design tensile stress (i.e. stretchability) in single-layer semiconductor transistors.

This approach is described in the article published IN Nature electronicsis based on the use of silicon nitride covering layers, which can cause deformation of the molybdenum disulfide (MoS) monolayer₂) transistors integrated on silicon substrates.

“We started exploring this idea back in 2020, when our research group made previous attempts to apply deformation by mechanically bending samples,” Eric Pop, senior author of the paper, told Tech Xplore.

“At the time, there were very few experimental demonstrations of using strain to improve the performance of two-dimensional (2D) material transistors, and none had achieved this using industry-friendly methods.

The main goal of Pop and his colleagues’ recent work was to try to identify promising new strain engineering techniques based on processing conventional silicon transistors that can be applied to 2D materials. After developing one of these techniques, they successfully applied it to two-dimensional MoS₂for the first time on a transistor basis.

“Taking inspiration from the early 21st century silicon industry, our strategy uses thin covering layers of silicon nitride (a material widely used in the industry) to stress a 2D semiconductor transistor,” Pop explained. “The stresses in these films can be precisely tuned and can be deposited at relatively low temperatures, which is advantageous in a variety of industrial applications.”

First, researchers processed 2D semiconductors using well-established fabrication techniques and used them to create transistors. At the end of processing, they added layers of silicon nitride, which allowed them to clearly determine the effects of these films on transistor stress, distinguishing them from effects related to temperature changes and doping.

“The first notable contribution of this work is the experimental demonstration that process-induced distortions exist in these two-dimensional material transistors (i.e., distortions caused by various fabrication steps during transistor fabrication) and can be used to increase the on-state current using techniques to which previously used silicon transistors,” Pop said.

“Importantly, we have also provided a simulation-based roadmap for how this strain will change as these devices are scaled down to technologically relevant dimensions, and we have found that deformation shows great promise in this system.”

In preliminary tests, the researchers found that their strain engineering approach improved the performance of 2D MoS₂ transistors while reducing both transistor channels and contacts. In the future, their work may contribute to the development of smaller and better performing 2D semiconductor transistors.

In the meantime, Pop and his colleagues plan to continue testing and refining their proposed strain engineering technique. They also plan to investigate the effects of strain on other 2D semiconductors beyond monolayer MoS_2.

“At a fundamental level, we use flexible substrates to study the effects of deformation in other 2D semiconductors that are less understood,” Pop added.

“Additionally, we are investigating other sources of process-induced stress, such as the effect of metal deposition on 2D materials (a key step in device fabrication). Finally, we are working on extending this approach to p-type 2D transistors (as opposed to n-type devices used in this study) because their performance currently lags behind n-type devices.

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